Re: [RFC PATCH v2 05/21] clk: renesas: rcar-gen3: switch to new SD clock handling
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-11-12 13:24:55
Also in:
linux-renesas-soc
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-11-12 13:24:55
Also in:
linux-renesas-soc
On Wed, Nov 10, 2021 at 8:16 PM Wolfram Sang [off-list ref] wrote:
The old SD handling code was huge and could not handle all the details which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to another design. Have SDnH a separate clock, use the existing divider clocks and move the errata handling from the clock driver to the SDHI driver where it belongs. This patch removes the old SD handling code and switch to the new one. This updates the SDHI driver at the same time. Because the SDHI driver can only communicate with the clock driver via clk_set_rate(), I don't see an alternative to this flag-day-approach, so we cross subsystems here. The patch sadly looks messy for the CPG lib, but it is basically a huge chunk of code removed and smaller chunks added. It looks much better when you just view the resulting source file. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
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