Thread (32 messages) 32 messages, 6 authors, 2017-10-31

Re: [PATCH 0/6] Boot-time switching between 4- and 5-level paging for 4.15, Part 1

From: Minchan Kim <minchan@kernel.org>
Date: 2017-10-20 09:49:33
Also in: lkml

Hi Ingo,

On Fri, Oct 20, 2017 at 10:18:53AM +0200, Ingo Molnar wrote:
* Kirill A. Shutemov [off-list ref] wrote:
quoted
On Tue, Oct 03, 2017 at 11:27:54AM +0300, Kirill A. Shutemov wrote:
quoted
On Fri, Sep 29, 2017 at 05:08:15PM +0300, Kirill A. Shutemov wrote:
quoted
The first bunch of patches that prepare kernel to boot-time switching
between paging modes.

Please review and consider applying.
Ping?
Ingo, is there anything I can do to get review easier for you?
Yeah, what is the conclusion on the sub-discussion of patch #2:

  [PATCH 2/6] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS

... do we want to skip it entirely and use the other 5 patches?
Sorry for the too much late reply, Kirill.
Yes, you can skip it.

As Nitin said in that patch's thread, zsmalloc has assumed
PFN_BIT is (BITS_PER_LONG - PAGE_SHIFT) so it already covers
X86_5LEVEL well, I think.

In summary, there is no need to change it.
I hope it helps to merge this patchset series.

Thanks.

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