Thread (64 messages) 64 messages, 11 authors, 2018-02-26

Re: [PATCH 04/11] Define the virtual space of KASan's shadow region

From: Russell King - ARM Linux <linux@armlinux.org.uk>
Date: 2017-10-19 12:42:47
Also in: linux-arm-kernel, lkml

On Mon, Oct 16, 2017 at 01:14:54PM +0100, Ard Biesheuvel wrote:
On 16 October 2017 at 12:42, Liuwenliang (Lamb) [off-list ref] wrote:
quoted
On 10/16/2017 07:03 PM, Abbott Liu wrote:
quoted
arch/arm/kernel/entry-armv.S:348: Error: selected processor does not support `movw r1,
  #:lower16:((((0xC0000000-0x01000000)>>3)+((0xC0000000-0x01000000)-(1<<29))))' in ARM mode
quoted
arch/arm/kernel/entry-armv.S:348: Error: selected processor does not support `movt r1,
  #:upper16:((((0xC0000000-0x01000000)>>3)+((0xC0000000-0x01000000)-(1<<29))))' in ARM mode

Thanks for building test. This error can be solved by following code:
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -188,8 +188,7 @@ ENDPROC(__und_invalid)
        get_thread_info tsk
        ldr     r0, [tsk, #TI_ADDR_LIMIT]
 #ifdef CONFIG_KASAN
-   movw r1, #:lower16:TASK_SIZE
-   movt r1, #:upper16:TASK_SIZE
+ ldr r1, =TASK_SIZE
 #else
        mov r1, #TASK_SIZE
 #endif
This is unnecessary:

ldr r1, =TASK_SIZE

will be converted to a mov instruction by the assembler if the value
of TASK_SIZE fits its 12-bit immediate field.
It's an 8-bit immediate field for ARM.

What it won't do is expand it to a pair of movw/movt instructions if it
doesn't fit.

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