Hello Clemens, Takashi,

On Fri, May 20, 2011 at 10:17 AM, Takashi Iwai [off-list ref] wrote:

At Fri, 20 May 2011 08:51:03 +0200,
Clemens Ladisch wrote:

quoted

Leon Woestenberg wrote:

quoted

On Thu, May 19, 2011 at 5:58 PM, Clemens Ladisch [off-list ref] wrote:

quoted

quoted

On Thu, May 19, 2011 at 12:14:40AM +0200, Leon Woestenberg wrote:

quoted

    vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);

So is this an architecture without coherent caches?

My aim is to have an architecture independent driver.

Please note that most MMU architectures forbid mapping the same memory
with different attributes, so you must use pgprot_noncached if and only
if dma_alloc_coherent actually uses it.  Something like the code below.

And I'm not sure if you have to do some additional cache flushes when
mapping on some architectures.

quoted

quoted

Or would you want to use pgprot_dmacoherent, if available?

Hmm, let me check that.

It's available only on ARM and Unicore32.

There's also dma_mmap_coherent(), which does exactly what you want if
your buffer is physically contiguous, but it's ARM only.
Takashi tried to implement it for other architectures; I don't know
what came of it.

PPC got this recently (thanks to Ben), but still missing in other
areas.

There was little uncertain issue on MIPS, and it looks difficult to
achieve it on PA-RISC at all.  The development was stuck due to lack
of time since then.

Thanks for all the insights, I wasn't aware there were arch-specific
calls that already solved the topic issue.

Having dma_mmap_coherent() there is good for one or two archs, but how
can we built portable drivers if the others arch's are still missing?

I assume this call is thus not officially DMA-API (yet)?

Clemens showed some pretty amazing preprocessor #if(def)s to cater for
the all the different arch's and their mapping/cache-coherency
behaviour, but that's not something I would like to put in a driver.

How would dma_mmap_coherent() look like on x86?


Regards,
-- 
Leon

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