Hi Paul,

On 2020年02月15日 02:37, Paul Cercueil wrote:

Hi Zhou,

I think you can move this patch before the clocksource one - it will 
work with the old clocksource code and in generally it's a good idea 
to ensure (if possible) that you can git-bisect without ending up with 
a broken kernel.

OK, I will do it in v5.

-Paul


Le sam., févr. 15, 2020 at 02:02, 周琰杰 (Zhou Yanjie) 
[off-list ref] a écrit :

quoted

Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
per core local timer, #2 for clocksource.

Tested-by: H. Nikolaus Schaller <redacted>
Tested-by: Paul Boddie <redacted>
Signed-off-by: 周琰杰 (Zhou Yanjie) <redacted>
---

Notes:
    v1->v2:
    No change.

    v2->v3:
    No change.

    v3->v4:
    Rebase on top of kernel 5.6-rc1.

 arch/mips/boot/dts/ingenic/ci20.dts | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 

b/arch/mips/boot/dts/ingenic/ci20.dts
index 37b9316..98c4c42 100644

--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts

@@ -456,6 +456,13 @@

 &tcu {
     /* 3 MHz for the system timer and clocksource */
-    assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
-    assigned-clock-rates = <3000000>, <3000000>;
+    assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
+                      <&tcu TCU_CLK_TIMER2>;
+    assigned-clock-rates = <3000000>, <3000000>, <750000>;
+
+    /*
+     * Use channel #0 and #1 for the per core system timer,
+     * and use channel #2 for the clocksource.
+     */
+    ingenic,pwm-channels-mask = <0xF8>;
 };

-- 
2.7.4