Re: [PATCH v2 4/6] dt: bindings: add mt7621-pll dt binding documentation
From: Rob Herring <robh@kernel.org>
Date: 2019-08-13 15:51:47
Also in:
linux-clk, linux-devicetree, lkml
On Wed, Jul 24, 2019 at 10:23:08AM +0800, Chuanhong Guo wrote:
quoted hunk ↗ jump to hunk
This commit adds device tree binding documentation for MT7621 PLL controller. Signed-off-by: Chuanhong Guo <redacted> --- Change since v1: drop useless syscon in compatible string .../bindings/clock/mediatek,mt7621-pll.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txtdiff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt b/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt new file mode 100644 index 000000000000..7dcfbd5283e3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt@@ -0,0 +1,18 @@ +Binding for Mediatek MT7621 PLL controller + +The PLL controller provides the 2 main clocks of the SoC: CPU and BUS. + +Required Properties: +- compatible: has to be "mediatek,mt7621-pll" +- #clock-cells: has to be one + +Optional properties: +- clock-output-names: should be "cpu", "bus" + +Example: + pll { + compatible = "mediatek,mt7621-pll";
You didn't answer Stephen's question on v1. Based on this binding, there is no way to control/program the PLL. Is this part of some IP block?
+ + #clock-cells = <1>; + clock-output-names = "cpu", "bus"; + }; -- 2.21.0