On 20/01/16 19:46, Alban wrote:

On Wed, 20 Jan 2016 12:49:48 +0000
Marc Zyngier [off-list ref] wrote:

quoted

On Tue, 17 Nov 2015 20:34:56 +0100
Alban Bedel [off-list ref] wrote:

quoted

Signed-off-by: Alban Bedel <albeu@free.fr>
---
 arch/mips/ath79/irq.c                    | 81
++------------------------ arch/mips/include/asm/mach-ath79/ath79.h
|  1 + drivers/irqchip/Makefile                 |  1 +
 drivers/irqchip/irq-ath79-cpu.c          | 97
++++++++++++++++++++++++++++++++ 4 files changed, 105
insertions(+), 75 deletions(-) create mode 100644
drivers/irqchip/irq-ath79-cpu.c

 
 [...]

quoted

quoted

+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned long pending;
+	int irq;
+
+	pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+	if (!pending) {
+		spurious_interrupt();
+		return;
+	}
+
+	pending >>= CAUSEB_IP;
+	while (pending) {
+		irq = fls(pending) - 1;
+		if (irq < ARRAY_SIZE(irq_wb_chan) && irq_wb_chan[irq] != -1)
+			ath79_ddr_wb_flush(irq_wb_chan[irq]);
+		do_IRQ(MIPS_CPU_IRQ_BASE + irq);

I'm rather unfamiliar with the MIPS IRQ handling, but I'm vaguely
surprised by the lack of domain. How do you unsure that the IRQ space
used here doesn't clash with the one created in your "misc" irqchip?

This driver extend the irq-mips-cpu driver which take care of setting up
a legacy domain starting from MIPS_CPU_IRQ_BASE for these interrupts. I
don't find this very nice either, but this patch is about moving the
code out of arch/mips, so I tried to minimize unrelated changes.

As long as there is an underlying domain reserving the CPU range, then
this is fine.

So for this patch:

Acked-by: Marc Zyngier <redacted>

	M.
-- 
Jazz is not dead. It just smells funny...