Re: [PATCH 0/3] MIPS: JZ4740: Move PWM driver to PWM framework
From: Thierry Reding <hidden>
Date: 2012-09-02 19:27:58
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On Sun, Sep 02, 2012 at 03:25:55PM +0200, Maarten ter Huurne wrote:
On Sunday 02 September 2012 11:52:27 Thierry Reding wrote:quoted
This small series fixes a build error due to a circular header dependency, exports the timer API so it can be used outside of the arch/mips/jz4740 tree and finally moves and converts the JZ4740 PWM driver to the PWM framework. Note that I don't have any hardware to test this on, so I had to rely on compile tests only. Patches 1 and 2 should probably go through the MIPS tree, while I can take patch 3 through the PWM tree. It touches a couple of files in arch/mips but the changes are unlikely to cause conflicts.Exporting the hardware outputs PWM2-7 as index 0-5 in the PWM core is rather confusing. I discussed with Lars on IRC and it's probably better to expose PWM0-7 through the API, but refuse to hand out PWM0 and PWM1 when requested, since their associated timers are in use by the system. I attached a diff that illustrates this approach. Note that if this approach is taken, the beeper ID in board-qi_lb60.c should be changed back from 2 to 4, since the beeper is attached to PWM4. I tested the "for-next" branch on the Dingoo A320 with the pwm-backlight driver. It didn't work at first, because the PWM number and the timer number didn't align: I requested PWM number 5 to get PWM7 and the GPIO of PWM7 was used, but with timer 5 instead of timer 7, resulting in a dark screen. However, it works fine after adding PWM0/1 as described above.
I haven't seen any usage of the pwm-backlight driver in mainline. I assume this is only present in some downstream repository?
If other people want to test on real hardware, you can find the code in branch jz-3.6-rc2-pwm in the qi-kernel repository. Unfortunately our web interface for git is still broken, but the repo itself is fine. git://projects.qi-hardware.com/qi-kernel.git Bye, Maarten
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diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c index db29b37..554e414 100644 --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c@@ -24,9 +24,11 @@ #include <asm/mach-jz4740/gpio.h> #include <timer.h> -#define NUM_PWM 6 +#define NUM_PWM 8 static const unsigned int jz4740_pwm_gpio_list[NUM_PWM] = { + JZ_GPIO_PWM0, + JZ_GPIO_PWM1, JZ_GPIO_PWM2, JZ_GPIO_PWM3, JZ_GPIO_PWM4,@@ -50,6 +52,13 @@ static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) unsigned int gpio = jz4740_pwm_gpio_list[pwm->hwpwm]; int ret; + /* + * Timer 0 and 1 are used for system tasks, so they are unavailable + * for use as PWMs. + */ + if (pwm->hwpwm < 2) + return -EBUSY; + ret = gpio_request(gpio, pwm->label); if (ret) {
An alternative approach would be to change pwm_chip.base from -1 (dynamically allocated) to 2, which would leave 0 and 1 unavailable. That should at least solve the problem that you had regarding the GPIO and timer mismatch. But the above also sounds sensible, and since both you and Lars agree that this is the better option, I can squash these changes into my patch with your permission. Thierry
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