On Wed, Jun 04, 2003 at 09:18:01AM +0530, Krishnakumar. R wrote:

How can we single step through an instruction 
in mips architecture. 

In intel 386 architecture if we set TF flag
of the EFLAGS register a trap will be generated
after every instruction. Is there a way in 
mips to do the same. 

On most MIPS processors there is no singlestepping feature.  You have to
manual insert a breakpoint into the instruction stream and deal with the
exception.

  Ralf