[PATCH 01/27] arm64: dts: mt8195: add infracfg_rst node
From: Tinghan Shen <hidden>
Date: 2021-06-15 17:33:28
Also in:
linux-arm-kernel, linux-devicetree, lkml
Subsystem:
arm/mediatek soc support, the rest · Maintainers:
Matthias Brugger, AngeloGioacchino Del Regno, Linus Torvalds
From: Crystal Guo <redacted> add infracfg_rst node which is for MT8195 platform Signed-off-by: Crystal Guo <redacted> --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 629cd883facf..8cda62f736b3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi@@ -8,6 +8,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/reset/ti-syscon.h> / { compatible = "mediatek,mt8195";
@@ -273,6 +274,20 @@ }; }; + infracfg: syscon@10001000 { + compatible = "mediatek,mt8195-infracfg", "syscon", "simple-mfd"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + + infracfg_rst: reset-controller { + compatible = "ti,syscon-reset"; + #reset-cells = <1>; + ti,reset-bits = < + 0x140 26 0x144 26 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) + >; + }; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt8195-wdt", "mediatek,mt6589-wdt"; reg = <0 0x10007000 0 0x100>;
--
2.18.0
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