RE: [PATCH 2/9] Input: ad714x - Fix padding for DMA safe buffers.
From: "Hennerich, Michael" <Michael.Hennerich@analog.com>
Date: 2022-11-28 07:14:59
-----Original Message-----
From: Jonathan Cameron <jic23@kernel.org>
Sent: Sonntag, 27. November 2022 15:41
To: linux-input@vger.kernel.org; Dmitry Torokhov
[off-list ref]
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>; Hennerich, Michael
[off-list ref]
Subject: [PATCH 2/9] Input: ad714x - Fix padding for DMA safe buffers.
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
On some architectures (e.g. arm64), ____cachline_aligned only aligns to the
cacheline size of the L1 cache size. L1_CACHE_BYTES in
arch64/include/asm/cache.h Unfortunately DMA safety on these architectures
requires the buffer no share a last level cache cacheline given by
ARCH_DMA_MINALIGN which has a greater granularity.
ARCH_DMA_MINALIGN is not defined for all architectures, but when it is
defined it is used to set the size of ARCH_KMALLOC_MINALIGN to allow DMA
safe buffer allocations.
As such the correct alignment requirement is
__aligned(ARCH_KMALLOC_MINALIGN).
This has recently been fixed in other subsystems such as IIO.
Fixes tag is inprecise because there may not have been any architectures
where the two values were different at the time of the earlier fix.
Fixes: c0409feb8689 ("Input: ad714x - use DMA-safe buffers for spi_write()")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Hennerich <michael.hennerich@analog.com>Acked-by: Michael Hennerich <michael.hennerich@analog.com>
quoted hunk ↗ jump to hunk
--- drivers/input/misc/ad714x.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/drivers/input/misc/ad714x.h b/drivers/input/misc/ad714x.h indexaf847b5f0d0e..2b8b901183be 100644--- a/drivers/input/misc/ad714x.h +++ b/drivers/input/misc/ad714x.h@@ -41,7 +41,7 @@ struct ad714x_chip { unsigned product; unsigned version; - __be16 xfer_buf[16] ____cacheline_aligned; + __be16 xfer_buf[16] __aligned(ARCH_KMALLOC_MINALIGN); }; --2.38.1