Re: [PATCH 7/9] Input: n64joy - Fix DMA buffer alignment.

On Sun, 27 Nov 2022 18:01:26 +0000
Jonathan Cameron [off-list ref] wrote:

quoted

This move is unnecessary, because the cacheline is 16 bytes and the
buffer is 64 bytes.

Ah.  That particular option hadn't occurred to me (and I'd failed to notice
how big the buffer is :( ).
The marking isn't needed at all then as the allocation is already
guaranteed to be sufficiently aligned. However, maybe that is a bit subtle
and having some sort of marking is useful.

You can replace the __cacheline annotation with a comment, that's
totally fine.

Curious question though, why is the buffer so big?
Each struct joydata is 8 bytes I think, but the driver only accesses 4 of them.

Is the hardware putting garbage into the remaining 2 cachelines or is there
something subtle going on?

That chip operates on 64-byte units. I don't remember whether the
remaining area is garbage or the input bytes or something else.

- Lauri