Re: [PATCH 02/10] i2c: xiic: Add standard mode support for > 255 byte read transfers
From: Marek Vasut <marex@denx.de>
Date: 2021-06-03 09:57:25
Also in:
linux-arm-kernel, lkml
On 6/3/21 7:33 AM, Raviteja Narayanam wrote: [...]
quoted
quoted
+ if (i2c->dynamic) { + u8 bytes; + u16 val; + + /* Clear and enable Rx full interrupt. */ + xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | + XIIC_INTR_TX_ERROR_MASK); + + /* + * We want to get all but last byte, because the TX_ERRORIRQquoted
+ * is used to indicate error ACK on the address, and + * negative ack on the last received byte, so to not mix + * them receive all but last. + * In the case where there is only one byte to receive + * we can check if ERROR and RX full is set at the same time + */ + rx_watermark = msg->len; + bytes = min_t(u8, rx_watermark, IIC_RX_FIFO_DEPTH); + bytes--; + + xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, bytes); + + local_irq_save(flags); + if (!(msg->flags & I2C_M_NOSTART)) + /* write the address */ + xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, + i2c_8bit_addr_from_msg(msg) | + XIIC_TX_DYN_START_MASK); + + xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); + + /* If last message, include dynamic stop bit with length */ + val = (i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0; + val |= msg->len; + + xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, val); + local_irq_restore(flags);Is local_irq_save()/local_irq_restore() used here to prevent concurrent access to the XIIC ?These were used to fix the timing constraint between two register writes to the IP. As we have discussed last time, these are removed in " [PATCH 08/10] i2c: xiic: Remove interrupt enable/disable in Rx path". Now they are no longer needed since our IP is fixed. For legacy IP versions, driver is switching to 'AXI I2C standard mode' of operation in " [PATCH 07/10] i2c: xiic: Switch to Xiic standard mode for i2c-read".
I see, I would expect such fixes to be at the beginning of the series, so they can be picked into linux-stable. In fact, now that you mention the bugfixes which I posted a year ago, they also fixed a multitude of locking issues on SMP in the xiic driver. Has this series been tested on SMP Zynq or ZynqMP extensively ?