The TC9563 PCIe switch embeds a GPIO controller providing 37 GPIO
lines. The controller is registered as an auxiliary device by the TC9563
power controller and accessed through the same register map.
Describe the switch node itself as the embedded GPIO controller and
document the per-port reset-gpios property.
Signed-off-by: Lorenzo Bianconi <redacted>
---
.../devicetree/bindings/pci/toshiba,tc9563.yaml | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
index f084830c6d0c..c4cd162cb084 100644
--- a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
+++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
@@ -31,6 +31,11 @@ properties:
description:
GPIO controlling the RESX# pin.
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
vdd18-supply: true
vdd09-supply: true@@ -84,6 +89,11 @@ $defs:
type: object
properties:
+ reset-gpios:
+ maxItems: 1
+ description:
+ GPIO controlling the reset line connected to the downstream port.
+
toshiba,tx-amplitude-microvolt:
description:
Change Tx Margin setting for low power consumption.@@ -128,7 +138,7 @@ examples:
ranges;
bus-range = <0x01 0xff>;
- pcie@0,0 {
+ tc9563: pcie@0,0 {
compatible = "pci1179,0623";
reg = <0x10000 0x0 0x0 0x0 0x0>;@@ -149,6 +159,9 @@ examples:
resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
pcie@1,0 {
compatible = "pciclass,0604";
reg = <0x20800 0x0 0x0 0x0 0x0>;@@ -158,6 +171,8 @@ examples:
ranges;
bus-range = <0x03 0xff>;
+ reset-gpios = <&tc9563 2 GPIO_ACTIVE_LOW>;
+
toshiba,no-dfe-support;
};
@@ -170,6 +185,8 @@ examples:
ranges;
bus-range = <0x04 0xff>;
+ reset-gpios = <&tc9563 3 GPIO_ACTIVE_LOW>;
+
toshiba,tx-amplitude-microvolt = <10>;
};
--
2.55.0