On 10/16/18 4:01 AM, Thierry Reding wrote:

On Mon, Oct 15, 2018 at 03:57:35PM -0700, Atish Patra wrote:

quoted

On 10/10/18 6:49 AM, Thierry Reding wrote:

quoted

On Tue, Oct 09, 2018 at 11:51:22AM -0700, Atish Patra wrote:

quoted

+Required properties:
+- compatible: should be one of
+	"sifive,fu540-c000-pwm0","sifive,pwm0".

What's the '0' in here? A version number?

I think yes. Since fu540 is the first Linux capable RISC-V core, SiFive Guys
decided mark it as version 0.

@Wesly: Please correct me if I am wrong.

It seems fairly superfluous to me to have a version number in additon to
the fu540-c000, which already seems to be the core plus some sort of
part number. Do you really expect there to be any changes in the SoC
that would require a different compatible string at this point? If the
SoC has taped out, how will you ever get a different version of the PWM
IP in it?

I would expect any improvements or changes to the PWM IP to show up in a
different SoC generation, at which point it would be something like
"sifive,fu640-c000" maybe, or perhaps "sifive,fu540-d000", or whatever
the numbering is.

The "0" suffix refers to a revision number for the underlying PWM IP block.

It's certainly important to keep that version number on the 
"sifive,pwm0" compatible string that doesn't have the chip name 
associated with it.

As to whether there could ever be a FU540-C000 part with different IP 
block versions on it: FU540-C000 is ultimately a marketing name.  While 
theoretically we shouldn't have another "FU540-C000" chip with different 
peripheral IP block versions on it, I don't think any engineer can 
guarantee that it won't happen.


- Paul