November 2026
12 messages across 8 threads.
| Last | Thread | Replies |
|---|---|---|
| Monday 9 November | ||
| [PATCH] fpga: altera-hps2fpga: do not request reset by index
Philipp Zabel
|
2 | |
| [PATCH] fpga: dfl: afu: prevent read-only region mappings from becoming writable
bo cao
|
2 | |
| Saturday 7 November | ||
| [PATCH v2] fpga: altera-hps2fpga: Fix reset control leak
Xiangwu Lai
|
none | |
| [PATCH v2] fpga: altera-cvp: Add Agilex5 CVP credit register support
tze.yee.ng@altera.com
|
1 | |
| [PATCH] fpga: altera-hps2fpga: Fix reset control leak
Xiangwu Lai
|
1 | |
| [PATCH v2] fpga: dfl: afu: prevent read-only port mappings from becoming writable
Abdifatah Suruur
|
1 | |
| [PATCH v3] fpga: altera-freeze-bridge: clear all illegal request bits
tze.yee.ng@altera.com
|
1 | |
| Tuesday 3 November | ||
| Re: Fw: [PATCH v3] fpga: altera-freeze-bridge: clear all illegal request bits
NG, TZE YEE
|
none | |