Thread (50 messages) 50 messages, 5 authors, 2022-07-26

Re: [PATCH v14 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver

From: CK Hu <hidden>
Date: 2022-07-15 09:37:53
Also in: dri-devel, linux-arm-kernel, linux-devicetree, linux-mediatek, lkml

Hi, Bo-Chen:

On Tue, 2022-07-12 at 19:12 +0800, Bo-Chen Chen wrote:
From: Markus Schneider-Pargmann <msp@baylibre.com>

This patch adds a embedded displayport driver for the MediaTek mt8195
SoC.

It supports the MT8195, the embedded DisplayPort units. It offers
DisplayPort 1.4 with up to 4 lanes.

The driver creates a child device for the phy. The child device will
never exist without the parent being active. As they are sharing a
register range, the parent passes a regmap pointer to the child so
that
both can work with the same register range. The phy driver sets
device
data that is read by the parent to get the phy device that can be
used
to control the phy properties.

This driver is based on an initial version by
Jitao shi [off-list ref]

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Guillaume Ranquet <redacted>
Signed-off-by: Bo-Chen Chen <redacted>
---
[snip]
+
+static enum drm_mode_status
+mtk_dp_bridge_mode_valid(struct drm_bridge *bridge,
+			 const struct drm_display_info *info,
+			 const struct drm_display_mode *mode)
+{
+	struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);
+	u32 rx_linkrate = (u32)mtk_dp->train_info.link_rate * 27000;
+	u32 bpp = info->color_formats & DRM_COLOR_FORMAT_YCBCR422 ? 16
: 24;
+
+	if (rx_linkrate * mtk_dp->train_info.lane_count < mode->clock *
bpp / 8)
+		return MODE_CLOCK_HIGH;
+
+	if (mode->clock > 600000)
+		return MODE_CLOCK_HIGH;
+
+	if ((mode->clock * 1000) / (mode->htotal * mode->vtotal) >
+	    MTK_VDOSYS1_MAX_FRAMERATE)
Why limit frame rate to 60fps? If the resolution is small enough, why
not support higher fps?

Regards,
CK
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
  
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