Re: [PATCH v5 04/28] mtd: spi-nor: swp: Improve locking user experience
From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: 2026-05-22 15:55:10
Also in:
lkml
From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: 2026-05-22 15:55:10
Also in:
lkml
On 22/05/2026 at 12:10:45 +03, Tudor Ambarus [off-list ref] wrote:
On 5/7/26 7:46 PM, Miquel Raynal wrote:quoted
Fixes: 3dd8012a8eeb ("mtd: spi-nor: add TB (Top/Bottom) protect support") Cc: stable@kernel.orgFixes shall be the first patches in the set.
Technically speaking all four first patches are fixes, except I don't ask the first one to be backported. The reason why we ask fixes to be first in the series is because we want them to be as independent as possible from previous cleanups/changes. Here each four first patch are targeting completely different places and should not interact with each other. Anyway, I will re-shuffle the patches. As for Sashiko's feedback, the AI raises the same point as our previous discussion: the QE bit handling is really bad, and I am working on improving this, in another series which waits for this one to land. However the other warning it raises is IMO wrong: mixed-modes chips (either read or write working in quad mode, and the other in single mode) should enable their QE bit anyway. Please raise a warning if you think this assumption is wrong. Thanks, Miquèl