[PATCH v2 1/2] arm64: dts: st: add sdmmc2 pins_b for stm32mp25
From: Mateusz Nowicki <hidden>
Date: 2026-09-23 11:47:59
Also in:
linux-arm-kernel, lkml
Subsystem:
arm/stm32 architecture, the rest · Maintainers:
Maxime Coquelin, Alexandre Torgue, Linus Torvalds
Add a second variant of the SDMMC2 default and open-drain pin groups, with the same pins and bias as the _a variant but faster output speeds: very high on CK, high on CMD and D0-D7. These are the OSPEEDR values given in the STM32MP25 datasheet for 120 MHz and 166 MHz operation. On the STM32MP257F-DK, the eMMC returns corrupted data in HS200 mode at 100 MHz with the _a groups, and no CRC error is reported. With the _b groups, four consecutive 1 GiB reads return the same data as a read at 50 MHz. The sleep groups are shared with the _a variant. Signed-off-by: Mateusz Nowicki <redacted> --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 68cc89cbe754..d9fd1ae632c9 100644
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi@@ -681,6 +681,51 @@ pins { }; }; + /omit-if-no-ref/ + sdmmc2_b4_pins_b: sdmmc2-b4-1 { + pins1 { + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */ + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */ + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */ + <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */ + <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { + pins1 { + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */ + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */ + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */ + <STM32_PINMUX('E', 12, AF12)>; /* SDMMC2_D3 */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */ + slew-rate = <2>; + drive-open-drain; + bias-pull-up; + }; + }; + /omit-if-no-ref/ sdmmc2_d47_pins_a: sdmmc2-d47-0 { pins {
@@ -704,6 +749,19 @@ pins { }; }; + /omit-if-no-ref/ + sdmmc2_d47_pins_b: sdmmc2-d47-1 { + pins { + pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */ + <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */ + <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */ + <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */ + slew-rate = <2>; + drive-push-pull; + bias-pull-up; + }; + }; + /omit-if-no-ref/ spi1_pins_a: spi1-0 { pins1 {
--
2.55.0