Add st,io-sync into eth2_rgmii_pins_b to configure the RGMII data pins
for DDR operation. This pinmux is used on DH electronics STM32MP23xx
and STM32MP25xx DHCOS DHSBC.
Fixes: e2fce4620933 ("arm64: dts: st: Add pinmux nodes for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board")
Signed-off-by: Marek Vasut <redacted>
---
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Bartosz Golaszewski <brgl@kernel.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: kernel@dh-electronics.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
---
arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index 757cdd2415394..75f516b8d6af7 100644
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -240,6 +240,7 @@ pins1 {
bias-disable;
drive-push-pull;
slew-rate = <3>;
+ st,io-sync = "data on both edges";
};
pins2 {
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */@@ -255,6 +256,7 @@ pins3 {
<STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
bias-disable;
+ st,io-sync = "data on both edges";
};
pins4 {
pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */--
2.53.0