On Mon, Sep 07, 2026 at 09:08:28PM +0800, Troy Mitchell wrote:
On Mon, Sep 7, 2026 at 07:26:04PM +0800, Inochi Amaoto wrote:
quoted
@@ -14,26 +14,29 @@ description: >
PCIe IP. The controller uses the DesignWare built-in MSI interrupt
controller, and supports 256 MSIs.
-allOf:
- - $ref: /schemas/pci/snps,dw-pcie.yaml#
-
properties:
compatible:
- const: spacemit,k1-pcie
+ enum:
+ - spacemit,k1-pcie
+ - spacemit,k3-pcie
Please update the title and description to cover K3 as well. They still describe
only K1.
- Troy
Right, I forgot this. Thanks for the reminder.
Regards,
Inochi