[PATCH 2/4] clk: qcom: rpmhcc: Add LNBB clocks support for Glymur
From: Jagadeesh Kona <hidden>
Date: 2026-09-04 18:51:09
Also in:
linux-arm-msm, linux-clk, lkml
Subsystem:
arm/qualcomm mailing list, common clk framework, qualcomm clock drivers, the rest · Maintainers:
Stephen Boyd, Brian Masney, Jerome Brunet, Bjorn Andersson, Linus Torvalds
Add support for rpmh LN_BB_CLK2 and LN_BB_CLK3 clocks on Qualcomm Glymur platform. Signed-off-by: Jagadeesh Kona <redacted> --- drivers/clk/qcom/clk-rpmh.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index ec8700b6186d8d6dd1911b7a33f086805770284a..3db81c709729b547f288eb10d4aa5dcf63d9e951 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c@@ -393,6 +393,7 @@ DEFINE_CLK_RPMH_VRM(clk2, _a1_e0, "C2A_E0", 1); DEFINE_CLK_RPMH_VRM(clk3, _a1_e0, "C3A_E0", 1); DEFINE_CLK_RPMH_VRM(clk4, _a1_e0, "C4A_E0", 1); DEFINE_CLK_RPMH_VRM(clk5, _a1_e0, "C5A_E0", 1); +DEFINE_CLK_RPMH_VRM(clk7, _a1_e0, "C7A_E0", 1); DEFINE_CLK_RPMH_VRM(clk8, _a1_e0, "C8A_E0", 1); DEFINE_CLK_RPMH_VRM(clk3, _a2_e0, "C3A_E0", 2);
@@ -902,6 +903,10 @@ static struct clk_hw *glymur_rpmh_clocks[] = { [RPMH_RF_CLK4_A] = &clk_rpmh_clk4_a1_e0_ao.hw, [RPMH_RF_CLK5] = &clk_rpmh_clk5_a1_e0.hw, [RPMH_RF_CLK5_A] = &clk_rpmh_clk5_a1_e0_ao.hw, + [RPMH_LN_BB_CLK2] = &clk_rpmh_clk7_a1_e0.hw, + [RPMH_LN_BB_CLK2_A] = &clk_rpmh_clk7_a1_e0_ao.hw, + [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a1_e0.hw, + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a1_e0_ao.hw, }; static const struct clk_rpmh_desc clk_rpmh_glymur = {
--
2.34.1