Re: [PATCH 4/4] clk: meson: t7: don't mark sys_ampipe_nand as critical
flat view
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2026-09-04 07:56:44
Also in:
linux-amlogic, linux-arm-kernel, linux-clk, linux-mmc, lkml
On jeu. 03 sept. 2026 at 23:59, Lucas Tanure [off-list ref] wrote:
sys_ampipe_nand clocks the pipeline stage inserted in the bus path between the SD/eMMC controllers and the NIC_MATRIX fabric. It does have identifiable consumers - the three MMC controllers - so marking it critical was the wrong tool: the clock should be referenced from the consumer nodes and claimed by the mmc driver instead. Drop the CLK_IS_CRITICAL flag and update the comment accordingly. sys_am2axi0..2 remain critical as they clock the AXI DMA bus itself and have no single identifiable consumer. This depends on the MMC controllers actually referencing the clock: the dt-bindings, mmc driver and t7 DTS changes adding the "pipeline" clock must land before this one, otherwise the boot hangs and memory corruption this clock caused are reintroduced.
This information typically goes bellow the '---' because we will not keep it for posterity. Please resend when your dependencies have been satisfied.
Fixes: 43e1705ecab9 ("clk: meson: t7: keep the memory fabric clocks running")Thinking of it, we probably do not want stable to pick this up since your other change are improvements that will no be backported. You can drop the Fixes
Assisted-by: Claude Fable 5 [off-list ref]
The Assisted-by should not have an email, especially a no reply one. check https://docs.kernel.org/process/coding-assistants.html
quoted hunk ↗ jump to hunk
Signed-off-by: Lucas Tanure <redacted> --- drivers/clk/meson/t7-peripherals.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)diff --git a/drivers/clk/meson/t7-peripherals.c b/drivers/clk/meson/t7-peripherals.c index 55d09e78593b..2f429ea86796 100644 --- a/drivers/clk/meson/t7-peripherals.c +++ b/drivers/clk/meson/t7-peripherals.c@@ -945,13 +945,13 @@ static T7_SYS_PCLK(sys_aucpu, SYS_CLK_EN0_REG0, 14, 0); static T7_SYS_PCLK(sys_cec, SYS_CLK_EN0_REG0, 16, 0); static T7_SYS_PCLK(sys_gdc, SYS_CLK_EN0_REG0, 17, 0); static T7_SYS_PCLK(sys_deswarp, SYS_CLK_EN0_REG0, 18, 0); +static T7_SYS_PCLK(sys_ampipe_nand, SYS_CLK_EN0_REG0, 19, 0); +static T7_SYS_PCLK(sys_ampipe_eth, SYS_CLK_EN0_REG0, 20, 0); /* - * NOTE: sys_ampipe_nand and sys_am2axi0..2 provide the clock to the AXI bus - * used for DMA between the peripherals and the DRAM. After the clocks are - * disabled, a device that starts a transfer cannot complete it. + * NOTE: sys_am2axi0..2 provide the clock to the AXI bus used for DMA between + * the peripherals and the DRAM. After the clocks are disabled, a device that + * starts a transfer cannot complete it. */ -static T7_SYS_PCLK(sys_ampipe_nand, SYS_CLK_EN0_REG0, 19, CLK_IS_CRITICAL); -static T7_SYS_PCLK(sys_ampipe_eth, SYS_CLK_EN0_REG0, 20, 0); static T7_SYS_PCLK(sys_am2axi0, SYS_CLK_EN0_REG0, 21, CLK_IS_CRITICAL); static T7_SYS_PCLK(sys_am2axi1, SYS_CLK_EN0_REG0, 22, CLK_IS_CRITICAL); static T7_SYS_PCLK(sys_am2axi2, SYS_CLK_EN0_REG0, 23, CLK_IS_CRITICAL);-- 2.55.0
-- Jerome