Re: [PATCH v4 6/6] riscv: dts: sophgo: dts nodes for i2s tdm modules
From: Inochi Amaoto <inochiama@gmail.com>
Date: 2026-02-25 22:32:50
Also in:
linux-riscv, linux-sound, lkml
On Tue, Jan 20, 2026 at 11:06:08PM +0400, Anton D. Stavinskii wrote:
quoted hunk ↗ jump to hunk
Introduced I2S nodes and internal dac and adc nodes as well The new header file provided in order to make DMA channel names more readable. Signed-off-by: Anton D. Stavinskii <redacted> --- arch/riscv/boot/dts/sophgo/cv180x-dmamux.h | 57 ++++++++++++++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv180x.dtsi | 55 ++++++++++++++++++++++++++++ 2 files changed, 112 insertions(+)diff --git a/arch/riscv/boot/dts/sophgo/cv180x-dmamux.h b/arch/riscv/boot/dts/sophgo/cv180x-dmamux.h new file mode 100644 index 000000000000..6314bf6e9dc8 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv180x-dmamux.h@@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2025 Inochi Amaoto <inochiama@gmail.com> + */ + +#ifndef _SOPHGO_CV18XX_DMAMUX +#define _SOPHGO_CV18XX_DMAMUX + +#define DMA_I2S0_RX 0 +#define DMA_I2S0_TX 1 +#define DMA_I2S1_RX 2 +#define DMA_I2S1_TX 3 +#define DMA_I2S2_RX 4 +#define DMA_I2S2_TX 5 +#define DMA_I2S3_RX 6 +#define DMA_I2S3_TX 7 +#define DMA_UART0_RX 8 +#define DMA_UART0_TX 9 +#define DMA_UART1_RX 10 +#define DMA_UART1_TX 11 +#define DMA_UART2_RX 12 +#define DMA_UART2_TX 13 +#define DMA_UART3_RX 14 +#define DMA_UART3_TX 15 +#define DMA_SPI0_RX 16 +#define DMA_SPI0_TX 17 +#define DMA_SPI1_RX 18 +#define DMA_SPI1_TX 19 +#define DMA_SPI2_RX 20 +#define DMA_SPI2_TX 21 +#define DMA_SPI3_RX 22 +#define DMA_SPI3_TX 23 +#define DMA_I2C0_RX 24 +#define DMA_I2C0_TX 25 +#define DMA_I2C1_RX 26 +#define DMA_I2C1_TX 27 +#define DMA_I2C2_RX 28 +#define DMA_I2C2_TX 29 +#define DMA_I2C3_RX 30 +#define DMA_I2C3_TX 31 +#define DMA_I2C4_RX 32 +#define DMA_I2C4_TX 33 +#define DMA_TDM0_RX 34 +#define DMA_TDM0_TX 35 +#define DMA_TDM1_RX 36 +#define DMA_AUDSRC 37 +#define DMA_SPI_NAND 38 +#define DMA_SPI_NOR 39 +#define DMA_UART4_RX 40 +#define DMA_UART4_TX 41 +#define DMA_SPI_NOR1 42 + +#define DMA_CPU_A53 0 +#define DMA_CPU_C906_0 1 +#define DMA_CPU_C906_1 2 + +#endif // _SOPHGO_CV18XX_DMAMUXdiff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi index 06b0ce5a2db7..ebe5e8113939 100644 --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi@@ -8,6 +8,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include "cv18xx-reset.h" +#include "cv180x-dmamux.h" / { #address-cells = <1>;@@ -448,6 +449,60 @@ usb: usb@4340000 { status = "disabled"; }; + i2s0: i2s@4100000 { + compatible = "sophgo,cv1800b-i2s"; + reg = <0x04100000 0x1000>; + clocks = <&clk CLK_APB_I2S0>, <&clk CLK_SDMA_AUD0>; + clock-names = "i2s", "mclk"; + dmas = <&dmamux DMA_I2S0_RX 1>, <&dmamux DMA_I2S0_TX 1>; + dma-names = "rx", "tx"; + status = "disabled"; + };
This magic number 1 is bind to the RISC-V cores, I think we should add a macro DMA_CPU_ID into CPU file to route the CPU id to real cores. Or, just let the borad dts configure which dma is enabled. Regards, Inochi
+
+ i2s1: i2s@4110000 {
+ compatible = "sophgo,cv1800b-i2s";
+ reg = <0x04110000 0x1000>;
+ clocks = <&clk CLK_APB_I2S1>, <&clk CLK_SDMA_AUD1>;
+ clock-names = "i2s", "mclk";
+ dmas = <&dmamux DMA_I2S1_RX 1>, <&dmamux DMA_I2S1_TX 1>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s2: i2s@4120000 {
+ compatible = "sophgo,cv1800b-i2s";
+ reg = <0x04120000 0x1000>;
+ clocks = <&clk CLK_APB_I2S2>, <&clk CLK_SDMA_AUD2>;
+ clock-names = "i2s", "mclk";
+ dmas = <&dmamux DMA_I2S2_RX 1>, <&dmamux DMA_I2S2_TX 1>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s3: i2s@4130000 {
+ compatible = "sophgo,cv1800b-i2s";
+ reg = <0x04130000 0x1000>;
+ clocks = <&clk CLK_APB_I2S3>, <&clk CLK_SDMA_AUD3>;
+ clock-names = "i2s", "mclk";
+ dmas = <&dmamux DMA_I2S3_RX 1>, <&dmamux DMA_I2S3_TX 1>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ int_adc: codec@300a100 {
+ compatible = "sophgo,cv1800b-sound-adc";
+ #sound-dai-cells = <0>;
+ reg = <0x300a100 0x100>;
+ status = "disabled";
+ };
+
+ int_dac: codec@300a000 {
+ compatible = "sophgo,cv1800b-sound-dac";
+ #sound-dai-cells = <0>;
+ reg = <0x300a000 0x100>;
+ status = "disabled";
+ };
+
rtc@5025000 {
compatible = "sophgo,cv1800b-rtc", "syscon";
reg = <0x5025000 0x2000>;
--
2.43.0