[PATCH v4 1/4] dt-bindings: crypto: ice: add operating-points-v2 property for QCOM ICE
From: Abhinaba Rakshit <hidden>
Date: 2026-01-28 08:46:55
Also in:
linux-arm-msm, linux-crypto, linux-scsi, lkml
Subsystem:
arm/qualcomm mailing list, crypto api, open firmware and flattened device tree bindings, the rest · Maintainers:
Herbert Xu, "David S. Miller", Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add support for specifying OPPs for the Qualcomm Inline Crypto Engine by allowing the use of the standard "operating-points-v2" property in the ICE device node. OPP-tabel is kept as an optional property. Signed-off-by: Abhinaba Rakshit <redacted> --- .../bindings/crypto/qcom,inline-crypto-engine.yaml | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index c3408dcf5d2057270a732fe0e6744f4aa6496e06..1e849def1e0078feb45874a436411188d26cf37f 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml@@ -30,6 +30,14 @@ properties: clocks: maxItems: 1 + operating-points-v2: + description: + Each OPP entry contains the frequency configuration for the ICE device + clock(s). + + opp-table: + type: object + required: - compatible - reg
@@ -46,5 +54,26 @@ examples: "qcom,inline-crypto-engine"; reg = <0x01d88000 0x8000>; clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + + operating-points-v2 = <&ice_opp_table>; + + ice_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-201500000 { + opp-hz = /bits/ 64 <201500000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-403000000 { + opp-hz = /bits/ 64 <403000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ...
--
2.34.1