[PATCH v4 0/4] arm64: dts: qcom: Introduce Glymur SoC dtsi and Glymur CRD dts
From: Pankaj Patil <hidden>
Date: 2026-01-12 12:23:31
Also in:
linux-arm-msm, lkml
Introduce dt-bindings and initial device tree support for Glymur, Qualcomm's next-generation compute SoC and it's associated Compute Reference Device (CRD) platform. https://www.qualcomm.com/products/mobile/snapdragon/laptops-and-tablets/snapdragon-x2-elite https://www.qualcomm.com/news/releases/2025/09/new-snapdragon-x2-elite-extreme-and-snapdragon-x2-elite-are-the- The base support enables booting to shell with rootfs on NVMe, demonstrating functionality for PCIe and NVMe subsystems. DCVS is also enabled, allowing dynamic frequency scaling for the CPUs. TSENS (Thermal Sensors) enabled for monitoring SoC temperature and thermal management. The platform is capable of booting kernel at EL2 with kvm-unit tests performed on it for sanity. Added dtsi files for the PMIC's enabled PMH0101, PMK8850, PMCX0102, SMB2370, PMH0104, PMH0110 along with temp-alarm and GPIO nodeS. For CPU compatible naming, there is one discussion which is not specific to Glymur, Kaanapali and Glymur use the same Oryon cores. https://lore.kernel.org/all/20251119-oryon-binding-v1-1-f79a101b0391@oss.qualcomm.com/ (local) We've kept the "qcom,oryon" compatible Features enabled in this patchset: 1. NVMe storage support 2. PCIe controller and PCIe PHY 3. RPMH Regulators 4. Clocks and reset controllers - GCC, TCSRCC, DISPCC, RPMHCC 5. Interrupt controller 6. TLMM (Top-Level Mode Multiplexer) 7. QUP Block 8. Reserved memory regions 9. PMIC support with regulators 10. CPU Power Domains 11. TSENS (Thermal Sensors) 12. DCVS: CPU DCVS with scmi perf protocol Dependencies: dt-bindings: 1. https://lore.kernel.org/all/20251216-knp-pmic-mfd-v3-1-9d0cd62676d9@oss.qualcomm.com/ (local) 2. https://lore.kernel.org/all/20251215-knp-pmic-leds-v3-0-5e583f68b0e5@oss.qualcomm.com/ (local) 3. https://lore.kernel.org/all/20251031-knp-ipcc-v3-1-62ffb4168dff@oss.qualcomm.com/ (local) 4. https://lore.kernel.org/all/20251231133114.2752822-1-pankaj.patil@oss.qualcomm.com/ (local) 5. https://lore.kernel.org/all/20260111155234.5829-1-pankaj.patil@oss.qualcomm.com/ (local) 6. https://lore.kernel.org/all/20251017-glymur_pcie-v5-3-82d0c4bd402b@oss.qualcomm.com/ (local) SPMI PMIC Arbiter: 1. https://lore.kernel.org/all/20251126-pmic_arb_v8-v5-0-4dd8dc5dc5a1@oss.qualcomm.com/ (local) Signed-off-by: Pankaj Patil <redacted> --- Changes in v4: - Enabled PCIe SMMU for all 4 PCIe instances - Updated dispcc required opps level to "rpmhpd_opp_low_svs" - Updated watchdog compatible - Renamed gic-its to msi-controller - Updated GCC clocks property to 43 from 44 - Moved cpu-idle-states to domain-idle-states - Fixed alignment and zero padding issues according to review comments - Dropped glymur-pmics.dtsi - Moved pmic thermal zones from board dts to soc dtsi - Link to v3: https://lore.kernel.org/r/20251219-upstream_v3_glymur_introduction-v3-0-32271f1f685d@oss.qualcomm.com (local) Changes in v3: - Enabled system-cache-controller - Squashed all initial features to boot to shell with nvme as storage - Updated tsens nodes according to comments - Merged tcsr and tcsrcc node - Addressed review comments - Link to v1: https://lore.kernel.org/all/20250925-v3_glymur_introduction-v1-0-24b601bbecc0@oss.qualcomm.com (local) Changes in v2: - Series was sent erroneously - Link to v1: https://lore.kernel.org/r/20250925-v3_glymur_introduction-v1-0-5413a85117c6@oss.qualcomm.com Signed-off-by: Pankaj Patil <redacted> --- Pankaj Patil (4): dt-bindings: arm: qcom: Document Glymur SoC and board arm64: defconfig: Enable Glymur configs for boot to shell arm64: dts: qcom: Introduce Glymur base dtsi arm64: dts: qcom: glymur: Enable Glymur CRD board support Documentation/devicetree/bindings/arm/qcom.yaml | 5 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/glymur-crd.dts | 601 +++ arch/arm64/boot/dts/qcom/glymur.dtsi | 5919 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pmcx0102.dtsi | 107 + arch/arm64/boot/dts/qcom/pmh0101.dtsi | 45 + arch/arm64/boot/dts/qcom/pmh0104-glymur.dtsi | 83 + arch/arm64/boot/dts/qcom/pmh0110-glymur.dtsi | 83 + arch/arm64/boot/dts/qcom/pmk8850.dtsi | 70 + arch/arm64/boot/dts/qcom/smb2370.dtsi | 45 + arch/arm64/configs/defconfig | 5 + 11 files changed, 6964 insertions(+) --- base-commit: 008d3547aae5bc86fac3eda317489169c3fda112 change-id: 20251007-upstream_v3_glymur_introduction-5a105b54493d prerequisite-message-id: [ref] prerequisite-patch-id: 64b5c2583a515ba7b77e521123058e10e2461313 prerequisite-message-id: [ref] prerequisite-patch-id: 8f2b3aff4b1a152b76251740883ca58a7ec87f48 prerequisite-message-id: [ref] prerequisite-patch-id: 6bbaff642cfd1f1386ff0ccd746739b68cdbeb45 prerequisite-patch-id: e30603778b23b7f7586b1c01a362e45af7bd0aa3 prerequisite-message-id: [ref] prerequisite-patch-id: bb0420363fa9587c62b9ff2f4c57ae9fcf6e4d10 prerequisite-patch-id: 1f263de890046d4051462ef213cdba260512b613 prerequisite-patch-id: e338d64b1966e05270704fc6583f7f3a4a48fa32 prerequisite-message-id: [ref] prerequisite-patch-id: 0ae26b101a15b1c4ede48da3fa10a8c923f6b557 prerequisite-message-id: [ref] prerequisite-patch-id: 6fde5d236f7b0518831d0cc4872630488e255d38 prerequisite-patch-id: 69d19c558f3f00da1fab8f034b1228f457991395 prerequisite-patch-id: 5b1bd5433c9f4ba23144047fb0634cda315ecf60 prerequisite-patch-id: 1edf633fb7824231026251d53d648ee997699dd9 prerequisite-patch-id: 71265feaeeef9fb57c2f23588f7b6491f45852f1 prerequisite-patch-id: e0700a937fac05063668bd254bb2c1eb9eedc9c9 prerequisite-message-id: [off-list ref] prerequisite-patch-id: 12162e5c8953ca1d287bb23f48e31634828d9abb prerequisite-patch-id: 0bc9a271a02ed879eb4b7c0f722dec4cf6dccfbd Best regards, -- Pankaj Patil [off-list ref]