[PATCH v2 05/24] arm64: dts: qcom: glymur: Add cpu idle states
From: Pankaj Patil <hidden>
Date: 2025-09-25 06:29:17
Also in:
linux-arm-msm, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
From: Maulik Shah <redacted> Add CPU power domains Signed-off-by: Maulik Shah <redacted> Signed-off-by: Pankaj Patil <redacted> --- arch/arm64/boot/dts/qcom/glymur.dtsi | 235 +++++++++++++++++++++++++++++++++++ 1 file changed, 235 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 8674465b22707207523caa8ad635d95a3396497a..66a548400c720474cde8a8b82ee686be507a795f 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi@@ -46,6 +46,9 @@ cpu0: cpu0@0 { compatible = "qcom,oryon"; reg = <0x0 0x0>; enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; l2_0: l2-cache {
@@ -60,6 +63,9 @@ cpu1: cpu1@100 { compatible = "qcom,oryon"; reg = <0x0 0x100>; enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; };
@@ -68,6 +74,9 @@ cpu2: cpu2@200 { compatible = "qcom,oryon"; reg = <0x0 0x200>; enable-method = "psci"; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; };
@@ -76,6 +85,9 @@ cpu3: cpu3@300 { compatible = "qcom,oryon"; reg = <0x0 0x300>; enable-method = "psci"; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; };
@@ -84,6 +96,9 @@ cpu4: cpu4@400 { compatible = "qcom,oryon"; reg = <0x0 0x400>; enable-method = "psci"; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; };
@@ -92,6 +107,9 @@ cpu5: cpu5@500 { compatible = "qcom,oryon"; reg = <0x0 0x500>; enable-method = "psci"; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER0_C4>; next-level-cache = <&l2_0>; };
@@ -100,6 +118,9 @@ cpu6: cpu6@10000 { compatible = "qcom,oryon"; reg = <0x0 0x10000>; enable-method = "psci"; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; l2_1: l2-cache {
@@ -114,6 +135,9 @@ cpu7: cpu7@10100 { compatible = "qcom,oryon"; reg = <0x0 0x10100>; enable-method = "psci"; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; };
@@ -122,6 +146,9 @@ cpu8: cpu8@10200 { compatible = "qcom,oryon"; reg = <0x0 0x10200>; enable-method = "psci"; + power-domains = <&CPU_PD8>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; };
@@ -130,6 +157,9 @@ cpu9: cpu9@10300 { compatible = "qcom,oryon"; reg = <0x0 0x10300>; enable-method = "psci"; + power-domains = <&CPU_PD9>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; };
@@ -138,6 +168,9 @@ cpu10: cpu10@10400 { compatible = "qcom,oryon"; reg = <0x0 0x10400>; enable-method = "psci"; + power-domains = <&CPU_PD10>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; };
@@ -146,6 +179,9 @@ cpu11: cpu11@10500 { compatible = "qcom,oryon"; reg = <0x0 0x10500>; enable-method = "psci"; + power-domains = <&CPU_PD11>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER1_C4>; next-level-cache = <&l2_1>; };
@@ -154,6 +190,9 @@ cpu12: cpu12@20000 { compatible = "qcom,oryon"; reg = <0x0 0x20000>; enable-method = "psci"; + power-domains = <&CPU_PD12>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; l2_2: l2-cache {
@@ -168,6 +207,9 @@ cpu13: cpu13@20100 { compatible = "qcom,oryon"; reg = <0x0 0x20100>; enable-method = "psci"; + power-domains = <&CPU_PD13>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; };
@@ -176,6 +218,9 @@ cpu14: cpu14@20200 { compatible = "qcom,oryon"; reg = <0x0 0x20200>; enable-method = "psci"; + power-domains = <&CPU_PD14>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; };
@@ -184,6 +229,9 @@ cpu15: cpu15@20300 { compatible = "qcom,oryon"; reg = <0x0 0x20300>; enable-method = "psci"; + power-domains = <&CPU_PD15>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; };
@@ -192,6 +240,9 @@ cpu16: cpu16@20400 { compatible = "qcom,oryon"; reg = <0x0 0x20400>; enable-method = "psci"; + power-domains = <&CPU_PD16>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; };
@@ -200,8 +251,78 @@ cpu17: cpu17@20500 { compatible = "qcom,oryon"; reg = <0x0 0x20500>; enable-method = "psci"; + power-domains = <&CPU_PD17>; + power-domain-names = "psci"; + cpu-idle-states = <&CLUSTER2_C4>; next-level-cache = <&l2_2>; }; + + idle-states { + entry-method = "psci"; + + CLUSTER0_C4: cpu-sleep-0 { + compatible = "arm,idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x00000004>; + entry-latency-us = <180>; + exit-latency-us = <320>; + min-residency-us = <1000>; + }; + + CLUSTER1_C4: cpu-sleep-1 { + compatible = "arm,idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x00000004>; + entry-latency-us = <180>; + exit-latency-us = <320>; + min-residency-us = <1000>; + }; + + CLUSTER2_C4: cpu-sleep-2 { + compatible = "arm,idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x00000004>; + entry-latency-us = <180>; + exit-latency-us = <320>; + min-residency-us = <1000>; + }; + + cluster0_cl5: cluster-sleep-0 { + compatible = "domain-idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x01000054>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <9000>; + }; + + cluster1_cl5: cluster-sleep-1 { + compatible = "domain-idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x01000054>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <9000>; + }; + + cluster2_cl5: cluster-sleep-2 { + compatible = "domain-idle-state"; + idle-state-name = "ret"; + arm,psci-suspend-param = <0x01000054>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <9000>; + }; + + APSS_OFF: cluster-ss3 { + compatible = "domain-idle-state"; + idle-state-name = "apps-pc"; + entry-latency-us = <2800>; + exit-latency-us = <4400>; + min-residency-us = <10150>; + arm,psci-suspend-param = <0x0200C354>; + }; + }; }; cpu-map {
@@ -669,6 +790,119 @@ pmu { psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: power-domain-cpu0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD1: power-domain-cpu1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD2: power-domain-cpu2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD3: power-domain-cpu3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD4: power-domain-cpu4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD5: power-domain-cpu5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER0_PD>; + }; + + CPU_PD6: power-domain-cpu6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD7: power-domain-cpu7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD8: power-domain-cpu8 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD9: power-domain-cpu9 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD10: power-domain-cpu10 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD11: power-domain-cpu11 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER1_PD>; + }; + + CPU_PD12: power-domain-cpu12 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CPU_PD13: power-domain-cpu13 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CPU_PD14: power-domain-cpu14 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CPU_PD15: power-domain-cpu15 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CPU_PD16: power-domain-cpu16 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CPU_PD17: power-domain-cpu17 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER2_PD>; + }; + + CLUSTER0_PD: power-domain-cpu-cluster0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER3_PD>; + domain-idle-states = <&cluster0_cl5>; + }; + + CLUSTER1_PD: power-domain-cpu-cluster1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER3_PD>; + domain-idle-states = <&cluster1_cl5>; + }; + + CLUSTER2_PD: power-domain-cpu-cluster2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER3_PD>; + domain-idle-states = <&cluster2_cl5>; + }; + + CLUSTER3_PD: power-domain-cpu-cluster3 { + #power-domain-cells = <0>; + domain-idle-states = <&APSS_OFF>; + }; }; soc: soc@0 {
@@ -3927,6 +4161,7 @@ apps_rsc: rsc@18900000 { <SLEEP_TCS 3>, <WAKE_TCS 3>, <CONTROL_TCS 0>; + power-domains = <&CLUSTER3_PD>; apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter";
--
2.34.1