On Fri, 18 Jul 2025 16:17:14 +0800, Ziyue Zhang wrote:
This series drop gcc_aux_clock in pcie phy, the pcie aux clock should
be gcc_phy_aux_clock. And sa8775p platform support link_down reset in
hardware, so add it for both pcie0 and pcie1 to provide a better user
experience.
Have follwing changes:
- Update pcie phy bindings for sa8775p.
- Document link_down reset.
- Remove aux clock from pcie phy.
- Add link_down reset for pcie.
[...]
Applied, thanks!
[2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset
commit: 10e7298dc0f14c52d9b5c52fb52558f567815b7c
Best regards,
--
Manivannan Sadhasivam [off-list ref]