Re: [PATCH v3 1/2] dt-bindings: i3c: Add adi-i3c-master

On 18/06/2025 21:55, Jorge Marques wrote:

quoted

Usually 0 has a meaning as well. Where is this used DTS snippet used (on
which platform)?

The example provided is used on AMD xilinx arm,cortex-a9-gic.
The IP core is tested on AMD Xilinx, Altera FPGAs (arm, microblaze, arm64).
Test/support to RiscV-based Lattice FPGAs should eventually also come.

In this example 0 means Shared Peripheral Interrupt, but has no header

Of course it has... just like 100% of bindings for devices in a SoC.

file defining. I guess I could make it generic and set to

  interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;

That's fine as well.



Best regards,
Krzysztof