Thread (12 messages) 12 messages, 4 authors, 2025-06-04

Re: [PATCH v1 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document link_down reset

From: Dmitry Baryshkov <hidden>
Date: 2025-06-03 13:11:41
Also in: linux-arm-msm, linux-pci, linux-phy, lkml

On Thu, May 29, 2025 at 11:54:14AM +0800, Ziyue Zhang wrote:
Each PCIe controller on sa8775p supports 'link_down'reset on hardware,
document it.
I don't think it's possible to "support" reset in hardware. Either it
exists and is routed, or it is not.
quoted hunk ↗ jump to hunk
Signed-off-by: Ziyue Zhang <redacted>
---
 .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml  | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
index e3fa232da2ca..805258cbcf2f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
@@ -61,11 +61,14 @@ properties:
       - const: global
 
   resets:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
Shouldn't we just update this to maxItems:2 / minItems:2 and drop
minItems:1 from the next clause?
quoted hunk ↗ jump to hunk
 
   reset-names:
+    minItems: 1
     items:
-      - const: pci
+      - const: pci # PCIe core reset
+      - const: link_down # PCIe link down reset
 
 required:
   - interconnects
@@ -161,8 +164,10 @@ examples:
 
             power-domains = <&gcc PCIE_0_GDSC>;
 
-            resets = <&gcc GCC_PCIE_0_BCR>;
-            reset-names = "pci";
+            resets = <&gcc GCC_PCIE_0_BCR>,
+                     <&gcc GCC_PCIE_0_LINK_DOWN_BCR>;
+            reset-names = "pci",
+                          "link_down";
 
             perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
             wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
-- 
2.34.1


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With best wishes
Dmitry
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