Thread (15 messages) 15 messages, 3 authors, 2025-02-20

Re: [PATCH v4 7/9] watchdog: rzv2h_wdt: Configure CPG_ERRORRST_SEL2 register

From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2025-02-20 10:20:47
Also in: linux-clk, linux-renesas-soc, linux-watchdog, lkml

Hi Prabhakar,

On Mon, 10 Feb 2025 at 19:49, Prabhakar [off-list ref] wrote:
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Currently, the watchdog driver relies on TF-A/U-Boot to configure the
`CPG_ERRORRST_SEL2` register. This register must be set correctly to
ensure a reset request is issued upon watchdog timer (WDT) underflow.

Now that the driver has access to the `syscon` handle for CPG, configure
`CPG_ERRORRST_SEL2` directly instead of depending on firmware. This
improves robustness by ensuring the required configuration is applied
within the driver itself.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!

IMHO doing it in the firmware stack is actually a good thing, as the
watchdog policy is system-wide, and thus goes beyond Linux running on
the application cores.

That is also the reason why commit 76b1c5b218f31811 ("[TEST] soc:
renesas: rcar-rst: Enable WDT reset on early R-Car V4M") is only
part of renesas-drivers[1], and not planned for upstream.  The sole
exception on modern R-Car is R-Car V3U, cfr. commit cb9a39aacd3d6387
("soc: renesas: rcar-rst: Allow WDT reset on R-Car V3U")[2].

[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=renesas-drivers-2025-02-18-v6.14-rc3&id=76b1c5b218f31811a7aaca588d3ec4ba584b7bf2
[2] https://elixir.bootlin.com/linux/v6.13.3/source/drivers/soc/renesas/rcar-rst.c#L76

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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