Re: [PATCH v3 0/6] Add support to retrieve the bootstatus from watchdog for RZ/V2H(P) SoC

Hi Biju,

On Mon, Jan 13, 2025 at 11:38 AM Biju Das [off-list ref] wrote:

Hi Prabhakar,

quoted

-----Original Message-----
From: Prabhakar <prabhakar.csengg@gmail.com>
Sent: 13 January 2025 11:24
Subject: [PATCH v3 0/6] Add support to retrieve the bootstatus from watchdog for RZ/V2H(P) SoC

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series adds SYSCON support to retrieve boot status information for RZ/V2H(P) SoC.
Summary of Changes,

    Clock:
        Add syscon compatible support to the CPG block in bindings and
        device trees.

    Watchdog:
        Document the renesas,r9a09g057-syscon-wdt-errorrst property.
        Update the watchdog driver to fetch and report boot status via
        Error Reset Registers (CPG_ERROR_RSTm).

    Device Tree:
        Add the syscon property to CPG and WDT nodes in R9A09G057 and
        R9A09G047 SoC DTSI.

These changes enable the watchdog driver to identify boot sources like Power-on Reset and Watchdog
Reset, improving system diagnostics.

This means that, we should assume U-boot/bootloader should not clear the WDT reset status bit.

If they clear it, there should be a way to propagate it from u-boot/bootloader to linux,
otherwise, we get wrong bootstatus in linux.
But the clearing of watchdog status by one of the cases:

1) u-boot identify the boot source and clear the status bit

I agree, if the tf-a/u-boot clears the register, the bootstatus
reported by Linux will be in-correct.

Alternative solution, would be:

Let the TF-A create WDT nodes for us and add a property
`renesas,r9a09g057-wdt-bootstatus` and propagate the WDT nodes to
Linux.

renesas,r9a09g057-wdt-bootstatus = <0/1>;

0 -> Power on reset
1 -> WDT reset

Geert/Rob/Krzysztof - Is the proposed approach acceptable or is there
any alternative where this can be avoided.

Cheers,
Prabhakar