Thread (91 messages) 91 messages, 8 authors, 2023-08-08

Re: [PATCH v2 08/28] soc: fsl: cpm1: qmc: Introduce available timeslots masks

From: Andrew Lunn <andrew@lunn.ch>
Date: 2023-08-01 09:36:07
Also in: alsa-devel, linux-arm-kernel, linux-gpio, linuxppc-dev, lkml, netdev

On Wed, Jul 26, 2023 at 05:02:04PM +0200, Herve Codina wrote:
quoted hunk ↗ jump to hunk
Available timeslots masks define timeslots available for the related
channel. These timeslots are defined by the QMC binding.

Timeslots used are initialized to available timeslots but can be a
subset of available timeslots.
This prepares the dynamic timeslots management (ie. changing timeslots
at runtime).

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 drivers/soc/fsl/qe/qmc.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index 2d2a9d88ba6c..21ad7e79e7bd 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -177,7 +177,9 @@ struct qmc_chan {
 	struct qmc *qmc;
 	void __iomem *s_param;
 	enum qmc_mode mode;
+	u64	tx_ts_mask_avail;
 	u64	tx_ts_mask;
+	u64	rx_ts_mask_avail;
 	u64	rx_ts_mask;
Is this for E1? So there is a maximum of 32 slots? A u32 would be
sufficient i think?

	   Andrew
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