[PATCH v1 4/4] riscv: dts: starfive: Add dphy rx node
From: Changhuang Liang <changhuang.liang@starfivetech.com>
Date: 2023-02-10 06:17:28
Also in:
linux-phy, linux-riscv, lkml
Subsystem:
risc-v architecture, starfive devicetrees, the rest · Maintainers:
Paul Walmsley, Palmer Dabbelt, Albert Ou, Emil Renner Berthing, Conor Dooley, Linus Torvalds
Add dphy rx node for the Starfive JH7110 SoC. It use to transfer the CSI cameras data. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index bce3e407ab60..bdd7b672fd94 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi@@ -488,5 +488,18 @@ voutcrg: clock-controller@295C0000 { #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; }; + + csi_phy: dphy@19820000 { + compatible = "starfive,jh7110-dphy-rx"; + reg = <0x0 0x19820000 0x0 0x10000>; + clocks = <&ispcrg JH7110_ISPCLK_M31DPHY_CFGCLK_IN>, + <&ispcrg JH7110_ISPCLK_M31DPHY_REFCLK_IN>, + <&ispcrg JH7110_ISPCLK_M31DPHY_TXCLKESC_LAN0>; + clock-names = "cfg", "ref", "tx"; + resets = <&ispcrg JH7110_ISPRST_M31DPHY_HW>, + <&ispcrg JH7110_ISPRST_M31DPHY_B09_ALWAYS_ON>; + starfive,aon-syscon = <&aon_syscon 0x00>; + #phy-cells = <0>; + }; }; };
--
2.25.1