[PATCH 5/9] riscv: dts: microchip: mpfs: Fix PLIC node
STALE1763d
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-11-25 15:41:45
Also in:
linux-riscv
Subsystem:
risc-v architecture, risc-v microchip support, the rest · Maintainers:
Paul Walmsley, Palmer Dabbelt, Albert Ou, Conor Dooley, Daire McNamara, Linus Torvalds
Revision v1 of 3 in this series.
Revisions (3)
- v1 current
- v2 [diff vs current]
- v3 [diff vs current]
Fix the device node for the Platform-Level Interrupt Controller (PLIC): - Add missing "#address-cells" property, - Sort properties according to DT bindings. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index d91226bfa586cda7..c71d2d682fc0a0e7 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi@@ -168,16 +168,17 @@ clint@2000000 { }; plic: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <186>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>, <&cpu1_intc 9>, <&cpu2_intc 11>, <&cpu2_intc 9>, <&cpu3_intc 11>, <&cpu3_intc 9>, <&cpu4_intc 11>, <&cpu4_intc 9>; + riscv,ndev = <186>; }; dma@3000000 {
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2.25.1