Thread (56 messages) 56 messages, 6 authors, 2021-11-22

Re: [PATCH v3 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs

From: Emil Renner Berthing <kernel@esmil.dk>
Date: 2021-11-10 11:15:30
Also in: linux-clk, linux-gpio, linux-riscv, linux-serial, lkml

On Wed, 10 Nov 2021 at 09:05, Andy Shevchenko [off-list ref] wrote:
On Tue, Nov 09, 2021 at 10:04:24PM +0100, Emil Renner Berthing wrote:
quoted
On Tue, 9 Nov 2021 at 21:29, Linus Walleij [off-list ref] wrote:
quoted
On Tue, Nov 9, 2021 at 10:40 AM Emil Renner Berthing [off-list ref] wrote:
...
quoted
No, I agree. I think it's only that Andy wasn't sure if these interim
states might be meaningful/useful.
Exactly. Because HW could behave differently.
Right. But I think we've now established that what is described in the
device tree is the state the pins should be in after the function has
been called, eg. only the reduction matters, and any interim states
would just be a byproduct of storing the state in the configs list.
quoted
quoted
And if it is possible
to write DTS files that have states and sequence requirements,
these should be caught in validation. Should be.
--
With Best Regards,
Andy Shevchenko



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