On 09/11/2021 17:44, Sam Protsenko wrote:

CMU_CMGP clock domain provides clocks for CMGP IP-core (Common GPIO).
CMGP module incapsulates next blocks:
  - 8 GPIO lines
  - 1 GPADC
  - 2 USI blocks, each can be configured to provide one of
    UART/SPI/HSI2C serial interfaces

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
 drivers/clk/samsung/clk-exynos850.c   | 100 ++++++++++++++++++++++++++
 include/dt-bindings/clock/exynos850.h |  17 +++++
 2 files changed, 117 insertions(+)

The header might need to be a separate patch, I think it was
preferred... anyway, I am fine with this approach as well:

Reviewed-by: Krzysztof Kozlowski <redacted>

Best regards,
Krzysztof