[PATCH v4 2/4] dt-bindings: mfd: sprd: Add bindings for ums512 global registers
From: Chunyan Zhang <zhang.lyra@gmail.com>
Date: 2021-09-23 06:42:06
Also in:
linux-clk, lkml
Subsystem:
multifunction devices (mfd), open firmware and flattened device tree bindings, the rest · Maintainers:
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: Chunyan Zhang <redacted> Add bindings for Unisoc system global register which provide register map for clocks. Signed-off-by: Chunyan Zhang <redacted> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/mfd/sprd,ums512-glbreg.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml
diff --git a/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml b/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml
new file mode 100644
index 000000000000..3522f3d2d8de
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml@@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc System Global Register Device Tree Bindings + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: + Unisoc system global registers provide register map + for clocks and some multimedia modules of the SoC. + +properties: + "#address-cells": true + "#size-cells": true + + compatible: + items: + - const: sprd,ums512-glbregs + - const: syscon + - const: simple-mfd + + ranges: + maxItems: 1 + + reg: + maxItems: 1 + +patternProperties: + "^.*@[0-9a-f]+$": + # Child node + type: object + $ref: "../clock/sprd,ums512-clk.yaml" + description: + Clock controller for the SoC clocks. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ap_apb_regs: syscon@71000000 { + compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; + reg = <0x71000000 0x3000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x71000000 0x3000>; + + clock-controller@0 { + compatible = "sprd,ums512-apahb-gate"; + reg = <0x0 0x2000>; + #clock-cells = <1>; + }; + }; + + - | + ap_intc5_regs: syscon@32360000 { + compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; + reg = <0x32360000 0x1000>; + };
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2.25.1