[PATCH v2 05/18] arm64: dts: qcom: sm6350: Add GCC node
From: Konrad Dybcio <hidden>
Date: 2021-08-28 13:18:43
Also in:
linux-arm-msm, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
Add and configure GCC node to allow for referencing GCC-controlled clocks in other nodes. Reviewed-by: AngeloGioacchino Del Regno <redacted> Signed-off-by: Konrad Dybcio <redacted> --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 95fdf40e3d60..d57c669ae0d6 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi@@ -3,6 +3,8 @@ * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> */ +#include <dt-bindings/clock/qcom,gcc-sm6350.h> +#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -359,6 +361,20 @@ soc: soc@0 { dma-ranges = <0 0 0 0 0x10 0>; compatible = "simple-bus"; + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sm6350"; + reg = <0 0x00100000 0 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", + "bi_tcxo_ao", + "sleep_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; + }; + ipcc: mailbox@408000 { compatible = "qcom,sm6350-ipcc", "qcom,ipcc"; reg = <0 0x00408000 0 0x1000>;
--
2.33.0