Thread (32 messages) 32 messages, 5 authors, 2022-01-17
STALE1598d
Revisions (2)
  1. v1 current
  2. v2 [diff vs current]

[PATCH 7/9] arm64: dts: rockchip: adjust rk3568 pll clocks

From: Peter Geis <hidden>
Date: 2021-07-28 13:56:22
Also in: linux-arm-kernel, linux-gpio, linux-rockchip, lkml
Subsystem: the rest · Maintainer: Linus Torvalds

The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

Signed-off-by: Peter Geis <redacted>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++
 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 8ba0516eedd8..91ae3c541c1a 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -230,6 +230,8 @@ cru: clock-controller@fdd20000 {
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
+		assigned-clock-rates = <1200000000>, <200000000>;
 	};
 
 	i2c0: i2c@fdd40000 {
-- 
2.25.1
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