-----Original Message-----
From: Stefan Chulski <redacted>
Sent: Thursday, July 8, 2021 14:50
To: Russell King <linux@armlinux.org.uk>; Kostya Porotchkin
[off-list ref]
Cc: miquel.raynal@bootlin.com; kishon@ti.com; vkoul@kernel.org;
robh+dt@kernel.org; andrew@lunn.ch; gregory.clement@bootlin.com;
sebastian.hesselbarth@gmail.com; vladimir.vid@sartura.hr;
luka.kovacic@sartura.hr; linux-phy@lists.infradead.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
kernel@lists.infradead.org; mw@semihalf.com; jaz@semihalf.com; Nadav
Haklai [off-list ref]; Ben Peled [off-list ref]
Subject: RE: [EXT] Re: [PATCH v6 4/5] dts: marvell: Enable 10G interfaces on
9130-DB and 9131-DB boards

quoted

External Email

----------------------------------------------------------------------
On Thu, Jul 08, 2021 at 02:25:27PM +0300, kostap@marvell.com wrote:

quoted

From: Stefan Chulski <redacted>

This patch enables eth0 10G interface on CN9130-DB paltforms and
eth0 10G and eth3 10G interfaces on CN9131-DB.

Signed-off-by: Stefan Chulski <redacted>
Signed-off-by: Konstantin Porotchkin <redacted>
---
 arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
arch/arm64/boot/dts/marvell/cn9131-db.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi

b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index 34274e061958..39fc90716454 100644

--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi

@@ -125,7 +125,7 @@

 /* SLM-1521-V2, CON9 */
 &cp0_eth0 {
-	status = "disabled";
+	status = "okay";
 	phy-mode = "10gbase-kr";

Are these really 10gbase-kr? Or should this be 10gbase-r ?

Should be 10gbase-r. By default we do not support full KR protocol.

[KP] So I will add a separate patch to this series changing "10gbase-kr" to "10gbase-r" in all CN91xx and A8K DTS.
Will it be OK?
Kosta

Regards.