Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
From: Marek Vasut <marex@denx.de>
Date: 2021-06-28 11:18:28
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linux-arm-kernel, lkml
On 6/28/21 1:14 PM, Peng Fan wrote:
quoted
Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM On 6/14/21 8:07 PM, Adam Ford wrote:quoted
On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) [off-list ref]wrote:quoted
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From: Peng Fan <peng.fan@nxp.com> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add that support in this driver. Reviewed-by: Abel Vesa <redacted> Signed-off-by: Peng Fan <peng.fan@nxp.com>Maybe my TF-A is too old, but I am not able to wake the device from suspend-to-ram with this series. I used the device tree from [1] to enable both the GPCv2 and the blk-ctl stuff. [1] - https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111 005quoted
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5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ WIjoiMC4wLjAquoted
wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&s data=0quoted
pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&reserved=0 I based both off Shawn's for-next branch.I also ran into issues with this, although it could also be related to GPCv2. On MX8MM , the system sometimes hangs when bringing up the GPCv2 power domain 6 (VPUMIX). It seems that the GPCv2 driver sets GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and the bit never self-clears. After that, it seems the entire GPC locks up. Have you ever seen that kind of behavior ?Do you have clk enabled for vpumix? Is this issue happends every time? Or hard to reproduce?
Yes, DEC_ROOT is active, I also activated BUS. It happens sporadically (every 5 or so reboots), I have to reboot the machine a few times to trigger it. It happens during the kernel boot process in every few boots.