Thread (33 messages) flat view 33 messages, 3 authors, 2021-06-11
STALE1883d LANDED: 7 (7M)

Revision v23 of 3 in this series; 1 review trailer (1 from subsystem maintainers); landed in mainline as a70eb9165e2a on 2021-06-10.

Revisions (3)
  1. v20 [diff vs current]
  2. v22 [diff vs current]
  3. v23 current

[PATCH v23 01/18] dt-binding: memory: pl353-smc: Rephrase the binding

From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: 2021-06-10 08:20:50
Also in: linux-arm-kernel, lkml
Subsystem: memory controller drivers, open firmware and flattened device tree bindings, the rest · Maintainers: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds

Reword this document before converting it to yaml.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../bindings/memory-controllers/pl353-smc.txt         | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
index d56615fd343a..f0b7fe173668 100644
--- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -1,8 +1,7 @@
 Device tree bindings for ARM PL353 static memory controller
 
-PL353 static memory controller supports two kinds of memory
-interfaces.i.e NAND and SRAM/NOR interfaces.
-The actual devices are instantiated from the child nodes of pl353 smc node.
+PL353 Static Memory Controller is a bus where you can connect two kinds
+of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
 
 Required properties:
 - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
@@ -13,9 +12,9 @@ Required properties:
 - address-cells		: Must be 2.
 - size-cells		: Must be 1.
 
-Child nodes:
- For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are
-supported as child nodes.
+The child device node represents the controller connected to the SMC
+bus. Only one between: NAND controller, NOR controller and SRAM controller
+is allowed in a single system.
 
 for NAND partition information please refer the below file
 Documentation/devicetree/bindings/mtd/partition.txt
-- 
2.27.0
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help