Add support to the axienet driver for controlling all of the clocks that
the logic core may utilize.
Note this patch set is dependent on "net: axienet: Fix probe error cleanup"
which has been submitted for the net tree.
Changed since v2:
-Additional clock description clarification
Changed since v1:
-Clarified clock usages in documentation and code comments
Robert Hancock (2):
dt-bindings: net: xilinx_axienet: Document additional clocks
net: axienet: Enable more clocks
.../bindings/net/xilinx_axienet.txt | 25 ++++++++++----
drivers/net/ethernet/xilinx/xilinx_axienet.h | 8 +++--
.../net/ethernet/xilinx/xilinx_axienet_main.c | 34 +++++++++++++++----
.../net/ethernet/xilinx/xilinx_axienet_mdio.c | 4 +--
4 files changed, 54 insertions(+), 17 deletions(-)
--
2.27.0