On Tue, Mar 16, 2021 at 11:22:40AM +0530, Manivannan Sadhasivam wrote:

On Mon, Mar 08, 2021 at 07:18:31PM +0200, Cristian Ciocaltea wrote:

quoted

Add support for the missing NIC and ETHERNET clocks in the Actions Semi
Owl S500 SoC clock driver.

Additionally, change APB clock parent from AHB to the newly added NIC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 drivers/clk/actions/owl-s500.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
index b9e434173b4f..0ccc9619b302 100644
--- a/drivers/clk/actions/owl-s500.c
+++ b/drivers/clk/actions/owl-s500.c

@@ -112,6 +112,7 @@ static const char * const bisp_clk_mux_p[] = { "display_pll_clk", "dev_clk" };
 static const char * const sensor_clk_mux_p[] = { "hosc", "bisp_clk" };
 static const char * const sd_clk_mux_p[] = { "dev_clk", "nand_pll_clk" };
 static const char * const pwm_clk_mux_p[] = { "losc", "hosc" };
+static const char * const nic_clk_mux_p[] = { "dev_clk", "display_pll_clk", "nand_pll_clk", "ddr_pll_clk" };

As per the reg field order, this should come after "ahbprediv_clk_mux_p"

Fixed, thanks!

Rest looks good.

Thanks,
Mani

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