Re: [PATCH 5/9] arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoC
From: Manivannan Sadhasivam <hidden>
Date: 2021-02-25 14:13:30
Also in:
linux-arm-kernel, linux-arm-msm, lkml
On Thu, Feb 25, 2021 at 03:00:21PM +0530, Sai Prakash Ranjan wrote:
Add the IPCC DT node which is used to send and receive IPC signals with remoteprocs for SC7280 SoC. Cc: Manivannan Sadhasivam <redacted> Signed-off-by: Sai Prakash Ranjan <redacted>
Reviewed-by: Manivannan Sadhasivam <redacted> Thanks, Mani
quoted hunk ↗ jump to hunk
--- arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index aeeb47c70c3a..65c1e0f2fb56 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi@@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,gcc-sc7280.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / {@@ -315,6 +316,15 @@ gcc: clock-controller@100000 { #power-domain-cells = <1>; }; + ipcc: mailbox@408000 { + compatible = "qcom,sc7280-ipcc", "qcom,ipcc"; + reg = <0 0x00408000 0 0x1000>; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + qupv3_id_0: geniqup@9c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x009c0000 0 0x2000>;-- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation