Re: [PATCH 03/15] dt-bindings: memory: fsl: convert ifc binding to yaml schema

On Mon, Feb 08, 2021 at 05:07:14PM +0000, Leo Li wrote:

quoted

-----Original Message-----
From: Rob Herring <robh@kernel.org>
Sent: Monday, February 8, 2021 10:55 AM
To: Leo Li <redacted>
Cc: linux-arm-kernel@lists.infradead.org; Oleksij Rempel <linux@rempel-
privat.de>; Rob Herring [off-list ref]; Krzysztof Kozlowski
[off-list ref]; devicetree@vger.kernel.org; linux-
kernel@vger.kernel.org; Shawn Guo [off-list ref]
Subject: Re: [PATCH 03/15] dt-bindings: memory: fsl: convert ifc binding to
yaml schema

On Fri, 05 Feb 2021 17:47:22 -0600, Li Yang wrote:

quoted

Convert the txt binding to yaml format and add description.  Also
updated the recommended node name to ifc-bus to align with the
simple-bus node name requirements.

Signed-off-by: Li Yang <redacted>
---
 .../bindings/memory-controllers/fsl/ifc.txt   |  82 ----------
 .../bindings/memory-controllers/fsl/ifc.yaml  | 140
++++++++++++++++++
 2 files changed, 140 insertions(+), 82 deletions(-)  delete mode
100644
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
 create mode 100644
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.yaml

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/memory-
controllers/fsl/ifc.example.dts:36.27-49.19: Warning (simple_bus_reg):
/example-0/soc/ifc-bus@ffe1e000/flash@0,0: simple-bus unit address
format error, expected "0"
Documentation/devicetree/bindings/memory-
controllers/fsl/ifc.example.dts:51.27-64.19: Warning (simple_bus_reg):
/example-0/soc/ifc-bus@ffe1e000/flash@1,0: simple-bus unit address
format error, expected "100000000"
Documentation/devicetree/bindings/memory-
controllers/fsl/ifc.example.dts:66.26-71.19: Warning (simple_bus_reg):
/example-0/soc/ifc-bus@ffe1e000/cpld@3,0: simple-bus unit address format
error, expected "300000000"

Hi Rob,

I saw these warnings, but cannot find a good solution to it.  The 
first cell in the address is the Chip select, while the second cell 
in the address is the address offset within the chip select.  It 
would confusing to combine the two cells of different purposes into 
a single address as suggested by the warning.  Can we allow the 
multi-cell address in the node name?

Drop 'simple-bus'. It's not a simple bus. You have registers that 
presumably have some configuration needed.

Rob