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+* Omnivision OV8865 MIPI CSI-2
+
+Required Properties:
+- compatible: should be "ovti,ov8865"
+- clocks: reference to the xclk input clock.
+- clock-names: should be "xclk".
+- DOVDD-supply: Digital I/O voltage supply, 2.8 volts
+- AVDD-supply: Analog voltage supply, 2.8 volts
+- AFVDD-supply: Analog voltage supply, 2.8 volts
+- DVDD-supply: Digital core voltage supply, 1.2 volts
+- reset-gpios: reference to the GPIO connected to the reset pin.
+	       This is an active low signal to the OV8865.
+- powerdown-gpios: reference to the GPIO connected to the powerdown pin.
+		   This is an active low signal to the OV8865.
+- rotation: as defined in
+	    Documentation/devicetree/bindings/media/video-interfaces.txt,
+	    valid values are 0 (sensor mounted upright) and 180 (sensor
+	    mounted upside down).
+- remote-endpoint: a phandle to the bus receiver's endpoint node.
+- clock-lanes: should be set to <0> (clock lane on hardware lane 0).
+- data-lanes: should be set to <4> (four CSI-2 lanes supported).
+
+The device node must contain one 'port' child node for its digital output video
+port, in accordance with the video interface bindings defined in
+Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+Example:
+&i2c2 {
+	ov8865: camera@36 {
+                 compatible = "ovti,ov8865";
+                 reg = <0x36>;
+                 clocks = <&ccu CLK_CSI_MCLK>;
+                 clock-names ="xclk";
+                 AVDD-supply = <&reg_ov8865_avdd>;
+                 DOVDD-supply = <&reg_ov8865_dovdd>;
+                 VDD2-supply = <&reg_ov8865_vdd2>;
+                 AFVDD-supply = <&reg_ov8865_afvdd>;
+                 powerdown-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */
+                 reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
+                 rotation = <180>;
+
+                 port {
+                         ov8865_to_mipi_csi2: endpoint {
+                                 remote-endpoint = <&mipi_csi2_from_ov8865>;
+                                 data-lanes = <1 2 3 4>;
+                                 clock-lanes = <0>;
+                                 bus-type = <4>; /* V4L2_FWNODE_BUS_TYPE_CSI2_DPHY */
+                         };
+		};
+	};
+};