[PATCH 09/10] arm64: dts: sparx5: Add spi-nor support
From: Lars Povlsen <hidden>
Date: 2020-05-13 14:01:20
Also in:
linux-arm-kernel, linux-spi, lkml
Subsystem:
arm/microchip (arm64) soc support, arm/microchip sparx5 soc support, the rest · Maintainers:
Conor Dooley, Nicolas Ferre, Claudiu Beznea, Steen Hegelund, Daniel Machon, Linus Torvalds
This add spi-nor device nodes to the Sparx5 reference boards. Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <redacted> --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 5 +++-- arch/arm64/boot/dts/microchip/sparx5_pcb125.dts | 9 +++++++++ arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi | 9 +++++++++ arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi | 9 +++++++++ 4 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index daa216978887d..330fd8b096d4c 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi@@ -155,8 +155,9 @@ spi0: spi@600104000 { reg-io-width = <4>; reg-shift = <2>; clocks = <&ahb_clk>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - + /* NB: Polled mode - next line commented out + * interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + */ status = "disabled"; };
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
index 573309fe45823..d8b5d23abfab0 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts@@ -39,6 +39,15 @@ &sdhci0 { microchip,clock-delay = <10>; }; +&spi0 { + status = "okay"; + spi-flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; /* input clock */ + reg = <0>; /* CS0 */ + }; +}; + &i2c1 { status = "okay"; };
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
index 18a535a043686..628a05d3f57ce 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi@@ -38,6 +38,15 @@ gpio-restart { }; }; +&spi0 { + status = "okay"; + spi-flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + &gpio { i2cmux_pins_i: i2cmux-pins-i { pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index d71f11a10b3d2..fb0bc3b241204 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi@@ -51,6 +51,15 @@ i2cmux_s32: i2cmux-3 { }; }; +&spi0 { + status = "okay"; + spi-flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; + reg = <0>; + }; +}; + &axi { i2c0_imux: i2c0-imux@0 { compatible = "i2c-mux-pinctrl"; --
2.26.2