[PATCH v4 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
From: 周琰杰 (Zhou Yanjie) <hidden>
Date: 2020-02-14 18:03:47
Also in:
linux-clk, linux-mips, lkml
Subsystem:
ingenic jz47xx socs, mips, the rest · Maintainers:
Paul Cercueil, Thomas Bogendoerfer, Linus Torvalds
Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
per core local timer, #2 for clocksource.
Tested-by: H. Nikolaus Schaller <redacted>
Tested-by: Paul Boddie <redacted>
Signed-off-by: 周琰杰 (Zhou Yanjie) <redacted>
---
Notes:
v1->v2:
No change.
v2->v3:
No change.
v3->v4:
Rebase on top of kernel 5.6-rc1.
arch/mips/boot/dts/ingenic/ci20.dts | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 37b9316..98c4c42 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts@@ -456,6 +456,13 @@ &tcu { /* 3 MHz for the system timer and clocksource */ - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; - assigned-clock-rates = <3000000>, <3000000>; + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, + <&tcu TCU_CLK_TIMER2>; + assigned-clock-rates = <3000000>, <3000000>, <750000>; + + /* + * Use channel #0 and #1 for the per core system timer, + * and use channel #2 for the clocksource. + */ + ingenic,pwm-channels-mask = <0xF8>; };
--
2.7.4